1-wire bus

Le bus 1-wire permet de connecter des quantites de peripheriques tout en n'usant qu'un seul port d'un ÁC.

Le fabricant de composant Dallas http://www.dalsemi.com propose une gamme complete de peripheriques :

  • memoires
  • horloges RTC
  • systemes de securite
  • compteurs
  • capteurs de temperature
  • I/O
  • convertisseurs A/D

L'autre nom du bus 1-wire est MicroLAN.

Ce bus est ideal pour relier a un processeur des peripheriques distants, tout en n'utilisant qu'une seule broche de port et une simple paire torsadee.

Les peripheriques distants connectes au processeur de controle - le maitre du bus - utilisent la tension presente au repos pour s'auto-alimenter. On dit que ces peripheriques "volent" l'alimentation. Le niveau bas du bus est assure par des transistors, tandis que le niveau haut est cree par une simple resistance.

On differencie les donnees par la duree de leur etat au niveau bas :

  • un niveau haut est cree en mettant le bus a la masse pendant 15Ás ou moins
  • un niveau bas est cree en maintenant le bus a la masse pendant au moins 60Ás
  • le maitre effectue un reset du bus en le maintenant a la masse pendant au moins 480Ás. Les peripheriques esclaves repondent en envoyant une impulsion de presence. Si une impulsion de presence est detectee, le maitre interroge l'esclave en envoyant son adresse. Chaque adresse est unique : le fabricant utilise un laser pour modifier une ROM integre a chaque CI peripherique. Ce numero de serie est compose de 48 bits, et il est impossible de trouver deux peripheriques ayant le meme numero de serie. A ces 48 bits s'ajoutent 8 bits qui determinent la famille du composant, et 8 autres bits d'un checksum.

Les caracteristiques sont ecrites dans le chapitre "Electrical Standards and Characteristics" du databook Dallas "iButton Standards". 

Cliquer pour telecharger une note d'applications expliquant le calcul du CRC

Merci a Dominique Pujol qui m'a transmis une routine de calcul du CRC pour un hc11 :


*        Test1.asm
         opt      l
*        opt      cre
*        TABS AT 10 19 30 72
*        Microprocessor: MC68HC711D3
*        Crystel Frequency: 4.9152 MHz
********************************************************************************
*        EQUATES
********************************************************************************
REGS     EQU      $0000      Internal regs are at $0000 - $003F
RAM      EQU      $0040      Internal RAM is at $0040 - $00FF
EXTRAM   EQU      $4000      External RAM is at $4000 - $BFFF
OTPROM   EQU      $F000      OTPROM is at $F000 - $FFFF
 
PORTA    EQU      $00        I/O Port A
RES1     EQU      $01        Reserved
PIOC     EQU      $02        Parallel I/O Control Register
PORTC    EQU      $03        I/O Port C
PORTB    EQU      $04        I/O Port B
RES2     EQU      $05        Reserved
DDRB     EQU      $06        Data Direction Register for Port B
DDRC     EQU      $07        Data Direction Register for Port C
PORTD    EQU      $08        I/O Port D
DDRD     EQU      $09        Data Direction Register for Port D
RES3     EQU      $0A        Reserved
CFORC    EQU      $0B        Compare Force Register
OC1M     EQU      $0C        OC1 Action Mask Register
OC1D     EQU      $0D        OC1 Action Data Register
TCNT     EQU      $0E        Timer Counter Register
*                 $0F        Second Byte
TIC1     EQU      $10        Input Capture 1 Register  <-- PA2
*                 $11        Second Byte
TIC2     EQU      $12        Input Capture 2 Register  <-- PA1
*                 $13        Second Byte
TIC3     EQU      $14        Input Capture 3 Register  <-- PA0
*                 $15        Second Byte
TOC1     EQU      $16        Output Compare 1 Register --> PA7
*                 $17        Second Byte
TOC2     EQU      $18        Output Compare 2 Register --> PA6
*                 $19        Second Byte
TOC3     EQU      $1A        Output Compare 3 Register --> PA5
*                 $1B        Second Byte
TOC4     EQU      $1C        Output Compare 4 Register --> PA4
*                 $1D        Second Byte
TI4O5    EQU      $1E        Output Compare 5 Register --> PA3
*                 $1F        Second Byte
TCTL1    EQU      $20        Timer Control Register 1
TCTL2    EQU      $21        Timer Control Register 2
TMSK1    EQU      $22        Main Timer Interrupt Mask Register 1
TFLG1    EQU      $23        Main Timer Interrupt Flag Reg 1
TMSK2    EQU      $24        Misc Timer Interrupt Mask Reg 2
TFLG2    EQU      $25        Misc Timer Interrupt Flag Reg 2
PACTL    EQU      $26        Pulse Accumulator Control Register
PACNT    EQU      $27        Pulse Accumulator Count Register
SPCR     EQU      $28        SPI Control Register
SPSR     EQU      $29        SPI Status Register
SPDR     EQU      $2A        SPI Data In/Out Register
BAUD     EQU      $2B        SCI Baud Rate Control Register
SCCR1    EQU      $2C        SCI Control Register 1
SCCR2    EQU      $2D        SCI Control Register 2
SCSR     EQU      $2E        SCI Status Register
SCDR     EQU      $2F        SCI Data (RDR, TDR) Register
RES4     EQU      $30        Reserved
RES5     EQU      $31        Reserved
RES6     EQU      $32        Reserved
RES7     EQU      $33        Reserved
RES8     EQU      $34        Reserved
RES9     EQU      $35        Reserved
RES10    EQU      $36        Reserved
RES11    EQU      $37        Reserved
RES12    EQU      $38        Reserved
OPTION   EQU      $39        System Configuration Options Reg
COPRST   EQU      $3A        Arm/Reset COP Timer Circuit Reg
PPROG    EQU      $3B        EEPROM Program Control Register
HPRIO    EQU      $3C        High Priority Interrupt and Misc Reg
INIT     EQU      $3D        RAM-I/O Maping Register
TEST1    EQU      $3E        Factory TEST Control Register
CONFIG   EQU      $3F        COP, ROM, & EEPROM Enables Register
 
DDRA7    EQU      $80        Data direction bit for PA7
DWOM     EQU      $20        Port D Wired-OR Mode of SPCR
TDRE     EQU      $80        Transmit Data Reg Empty of SCSR
TC       EQU      $40        Transmit Complete of SCSR
RDRF     EQU      $20        Receive Data Reg Full of SCSR
ELAT     EQU      $20        ELAT bit of PPROG reg
PGM      EQU      $01        PGM bit of PPROG reg
OC1F     EQU      $80        OC1F bit of TFLG1 reg
 
BIT0     EQU      $01        Bit 0 of a byte
BIT1     EQU      $02        Bit 1 of a byte
BIT2     EQU      $04        Bit 2 of a byte
BIT3     EQU      $08        Bit 3 of a byte
BIT4     EQU      $10        Bit 4 of a byte
BIT5     EQU      $20        Bit 5 of a byte
BIT6     EQU      $40        Bit 6 of a byte
BIT7     EQU      $80        Bit 7 of a byte
 
NUL      EQU      $00        The hex 00 byte
SOH      EQU      $01        Start of header character
STX      EQU      $02        Start of text character
ETX      EQU      $03        End of text character
EOT      EQU      $04        End of transmission character
ENQ      EQU      $05        Enqueue character
ACK      EQU      $06        Acknowledge character
LF       EQU      $0A        Line feed character
CR       EQU      $0D        Carriage return character
XON      EQU      $11        Transmit on character
XOFF     EQU      $13        Transmit off character
NAK      EQU      $15        Not acknowledge character
SP       EQU      $20        Space character
 
********************************************************************************
*        BRANCH VECTORS
********************************************************************************
         ORG      RAM
JSCI     JMP      START
JSPI     JMP      START
JPAIE    JMP      START
JPAO     JMP      START
JTOF     JMP      START
JTOC5    JMP      START
JTOC4    JMP      START
JTOC3    JMP      START
JTOC2    JMP      START
JTOC1    JMP      START
JTIC3    JMP      START
JTIC2    JMP      START
JTIC1    JMP      START
JRTI     JMP      START
JIRQ     JMP      START
JXIRQ    JMP      START
JSWI     JMP      START
JILLOP   JMP      START
JCOP     JMP      START
JCLM     JMP      START
JRST     JMP      START
 
********************************************************************************
*        VARIABLES
********************************************************************************
TEMP     RMB      1
TEMP0    RMB      1
TEMP1    RMB      1
BCDBYTE  RMB      1
BUFFER   RMB      16
HEXFLG   RMB      1
SHFTREG  RMB      2
 
INPUT    RMB      1
DATA     RMB      1
CRC      RMB      1
 
MARK1    EQU      *          Marker indicating last address used
 
********************************************************************************
*        STACK
********************************************************************************
         ORG      RAM+191
STACK    EQU      *          Bytes are stored from here backwards
 
********************************************************************************
*        EXTERNAL PROGRAM
********************************************************************************
         ORG      EXTRAM
START    LDS      #STACK     Set the stack pointer
 
         LDAA     #$13
         STAA     OPTION     DLY to 1, CR1-CR0 to 11
         LDAA     #$00
         STAA     INIT       RAM3-RAM0 to $0, REG3-REG0 to $0
         LDAA     #$06
         STAA     CONFIG     NOCOP to 1, EPON to 1
         LDAA     #$25
         STAA     HPRIO      MDA to 1, PSEL3-PSEL0 to $5
         LDAA     #$88
         STAA     PACTL      DDRA7 to 1, DDRA3 to 1
 
         LDAA     #$02
         STAA     PORTD      Set PD1 to 1
         STAA     DDRD       Set PD1 for output
         LDAA     #$03       Set BAUD rate for 9600
         STAA     BAUD        with 4.9152MHz crystal
         LDAA     #$0C       Set TE and RE bits
         STAA     SCCR2       in SCCR2
 
         BCLR     PACTL DDRA7  Make sure DDRA7 of PACTL is zero
         BCLR     PORTA BIT7   Make sure PA7 is zero
 
         LDY      #MSG1      'Started temperature sense'
         JSR      OUTSTRG    Send opening message
 
*        If no temperature sensor connected, loop here
START1   JSR      RESET      Send master reset pulse
         BCC      START1
 
*        Request a temperature conversion
         LDAA     #$CC       Skip ROM command
         JSR      OUTBYTE    Send it
         LDAA     #$44       Convert temperature command
         JSR      OUTBYTE    Send it
 
*        Loop here while sensor is busy
START2   JSR      INTBIT     Send bit time slot
         BCC      START2     Receive busy status
 
         JSR      RESET      This ends the convert temperature command
 
*        Get the temperature bytes
         LDAA     #$CC       Skip ROM command
         JSR      OUTBYTE    Send it
         LDAA     #$BE       Read scratchpad command
         JSR      OUTBYTE    Send it
         JSR      INBYTE     Get the first temperature byte
         LDAA     DATA
         STAA     TEMP0      Save it
         JSR      INBYTE     Get the second temperature byte
         LDAA     DATA
         STAA     TEMP1      Save it
 
*        Enter plus or minus sign into the buffer
TEST2    LDY      #BUFFER    Point to buffer
         LDAA     TEMP1      Get the high order temperature byte
         BITA     #$80       Test high order bit
         BNE      TEST2A     A one indicates negative temperature
         LDAA     #'+'
         STAA     0,Y        Save a + into the buffer
         INY                 Increment buffer pointer
         JMP      BCD0
 
TEST2A   LDAA     #'-'
         STAA     0,Y        Save a - into the buffer
         INY                 Increment buffer pointer
         LDAA     TEMP0
         NEGA                Convert 2s complement temperature
         STAA     TEMP0
         JMP      BCD0
 
*        Convert the temperature to BCD and enter digits into the buffer
BCD0     CLRA                Start off with A cleared
         LDAB     TEMP0      Get the temperature byte
         BITB     #$02       Test bit 1
         BEQ      BCD1       Branch if 0
         ADDA     #$01
         DAA                 Set/reset carry
BCD1     BITB     #$04       Test bit 2
         BEQ      BCD2       Branch if 0
         ADDA     #$02
         DAA
BCD2     BITB     #$08       Test bit 3
         BEQ      BCD3       Branch if 0
         ADDA     #$04
         DAA
BCD3     BITB     #$10       Test bit 4
         BEQ      BCD4
         ADDA     #$08
         DAA
BCD4     BITB     #$20       Test bit 5
         BEQ      BCD5
         ADDA     #$16
         DAA
BCD5     BITB     #$40       Test bit 6
         BEQ      BCD6
         ADDA     #$32
         DAA
BCD6     BITB     #$80       Test bit 7
         BEQ      BCD7
         ADDA     #$64
         DAA
BCD7     STAA     BCDBYTE    Save it for now
         BCS      BCD8       Branch if carry
         LDAA     #$00       Else load a zero
         BRA      BCD9
BCD8     LDAA     #$01       Load a one
BCD9     JSR      PUT1ASC
         LDAA     BCDBYTE
         JSR      PUT1HEX
         LDAA     #'.'
         STAA     0,Y        Put a decimal point into the buffer
         INY
         BITB     #$01       Test bit 0
         BNE      BCD10
         LDAA     #'0'
         BRA      BCD11
BCD10    LDAA     #'5'
BCD11    STAA     0,Y        Put a decimal digit into the buffer
         INY
*        LDAA     #$F8       Degree symbol
*        STAA     0,Y
*        INY
*        LDAA     #'C'       Celsius
*        STAA     0,Y
*        INY
         LDAA     #NUL
         STAA     0,Y        Indicate end of buffer
 
         LDY      #BUFFER    Reload start of buffer address
         JSR      OUTSTRG    Send the buffer out
         JMP      START1     Loop
 
********************************************************************************
         opt      c
*        Reset pulse routine
RESET    BSET     PACTL DDRA7 Start the pulse
         LDX      #95         Delay=(20+(Xvalue*6))*813.80E-9
         JSR      DELAY
         BCLR     PACTL DDRA7 End the pulse
         LDX      #9          Delay=(20+(Xvalue*6))*813.80E-9
         JSR      DELAY
         BRSET    PORTA BIT7 NOSENS
         LDX      #82
         JSR      DELAY
         SEC                 Indicate presence pulse
         RTS
NOSENS   LDX      #82
         JSR      DELAY
         CLC                 Indicate no presence pulse
         RTS
         opt      noc
 
********************************************************************************
*        Transmit byte routine - assumes A has byte to send
         opt      c
OUTBYTE  STAA     TEMP       Set up loop
         LDAB     #8         Bit count to B
OUTBYTE1 LDAA     TEMP       Get the data byte
         LSRA                Shift low order bit into carry
         STAA     TEMP       Save remainder
         BCS      OUTBYTE2   Branch if sending a '1'
         BSET     PACTL DDRA7 Start the pulse
         LDX      #9         Delay=(20+(Xvalue*6))*813.80E-9
         JSR      DELAY
         BCLR     PACTL DDRA7 End the pulse
         BRA      OUTBYTE3
OUTBYTE2 BSET     PACTL DDRA7 Start the pulse
         BCLR     PACTL DDRA7 End the pulse
         LDX      #9         Delay=(20+(Xvalue*6))*813.80E-9
         JSR      DELAY
         BRA      OUTBYTE3   Required to keep cycles the same
OUTBYTE3 DECB                Decrement bit count
         BNE      OUTBYTE1   Loop if more bits to go
         RTS
         opt      noc
 
********************************************************************************
*        Receive bit routine
         opt      c
INTBIT   BSET     PACTL DDRA7 Begin time slot pulse
         BCLR     PACTL DDRA7 End time slot pulse
         LDAA     PORTA
         LDAA     PORTA
         LDAA     PORTA      Get the data bit
         LSLA                Put it into carry
         LDX      #9
         JSR      DELAY
         RTS
         opt      noc
 
********************************************************************************
*        Receive byte routine
         opt      c
INBYTE   LDAB     #8         Bit count
 
INTBYTE1 BSET     PACTL DDRA7 Begin time slot pulse
         BCLR     PACTL DDRA7 End time slot pulse
         LDAA     PORTA
         LDAA     PORTA
         LDAA     PORTA      Get the data bit
         LSLA                Put it into carry
         LDX      #9         Delay=(20+(Xvalue*6))*813.80E-9
         JSR      DELAY
 
         LDAA     DATA       Get current data byte
         RORA                Shift carry into it
         STAA     DATA       Save it
 
*        Enable the CRC check below when retrieving the 64-bit lasered ROM
*        Before retrieval, zero out the CRC byte. After receiving all
*        64 bits of the ROM, the CRC byte should be zero again.
*        ANDA     #$80       Mask out high order bit
*        STAA     INPUT      Save it for CRC routine
*        BSR      CRCGEN     Compute CRC
 
         DECB                Decrement bit counter
         BNE      INTBYTE1   Loop if more bits to go
         RTS
         opt      noc
 
********************************************************************************
*        Compute the CRC
         opt      c
CRCGEN   LDAA     CRC        Get current CRC byte
         BRCLR    CRC BIT0 CRCGEN1 Branch if bit 0 of CRC is '0'
         SEC                 Else set the carry latch
         BRA      CRCGEN2
CRCGEN1  CLC                 Clear the carry latch
CRCGEN2  RORA                Rotate all bits to the right
         EORA     INPUT      Modify bit 7 using the input bit
         BITA     #$80       Test the state of bit 7
         BEQ      CRCGEN3    If clear then bits 2 & 3 OK as-is
         EORA     #$0C       Else flip bits 2 & 3
CRCGEN3  STAA     CRC        Save new CRC value
         RTS
         opt      noc
 
********************************************************************************
*        Delay routine
         opt      c
DELAY    DEX                 The carry bit is not affected by this routine
         BNE      DELAY
         RTS
         opt      noc
 
********************************************************************************
*        SERIAL INTERFACE ROUTINES
********************************************************************************
INCHAR   BRCLR    SCSR RDRF *   Wait for RDRF
         LDAA     SCDR       Get the incoming byte
         RTS                 Return
 
OUTCHAR  BRCLR    SCSR TDRE *   Wait for TDRE
         STAA     SCDR
         RTS
 
OUTCRLF  LDAA     #$0D       Carriage return
         BSR      OUTCHAR
         LDAA     #$0A       Line feed
         BSR      OUTCHAR
         RTS
 
OUTSTRG  LDAA     0,Y        Get char from memory
         CMPA     #NUL       If it is NUL,
         BEQ      OUTSTRG1    get out
         BSR      OUTCHAR    Else, send char
         INY                 Increment memory pointer
         BRA      OUTSTRG    Loop
OUTSTRG1 BSR      OUTCRLF    Send CRLF
         RTS
 
OUTLH    LSRA                Shift data to right
         LSRA
         LSRA
         LSRA
OUTRH    ANDA     #$0F       Mask top half
         ADDA     #$30       Convert to ASCII
         CMPA     #$39
         BLE      OUTRH1     Jump if 0-9
         ADDA     #$07       Convert to hex A-F
OUTRH1   BSR      OUTCHAR    Output character
         RTS
 
OUT1BYT  PSHA                Save copy
         BSR      OUTLH      Output left half
         PULA                Retrieve copy
         BSR      OUTRH      Output right half
         RTS
 
OUT2BYT  BSR      OUT1BYT    Do first byte
         TBA                 Transfer B to A
         BSR      OUT1BYT    Do next byte
         LDAA     #SP        Output a space
         BSR      OUTCHAR
         RTS
 
********************************************************************************
*        PUT1ASC - Converts the LSB nibble of A to ASCII Hex character
*                  and stores it in the buffer addressed by Y
*                - Exit with Y pointing to the next empty buffer location
*
********************************************************************************
PUT1ASC  ANDA     #$0F
         CMPA     #10
         BMI      PTASC1
         ADDA     #7
PTASC1   ADDA     #$30
         STAA     0,Y
         INY
         RTS
 
********************************************************************************
*        PUT1HEX - Converts the contents of A to 2 ASCII Hex characters
*                  and stores them in the buffer addressed by Y
*                - Exit with Y pointing to the next empty buffer location
*
********************************************************************************
PUT1HEX  PSHA
         LSRA
         LSRA
         LSRA
         LSRA
         JSR      PUT1ASC
         PULA
         JSR      PUT1ASC
         RTS
 
********************************************************************************
*        PUT2HEX - Converts the contents of D to 4 ASCII Hex characters
*                  and stores them in the buffer addressed by Y
*                - Exit with Y pointing to the next empty buffer location
*
********************************************************************************
PUT2HEX  JSR      PUT1HEX
         TBA
         JSR      PUT1HEX
         RTS
 
********************************************************************************
*        MESSAGES
********************************************************************************
MSG1     FCC      'Started temperature sense'
         FCB      NUL
 
MARK2    EQU      *          Marker indicating last address used
 
         END      START

 
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derniere mise a jour : dimanche janvier 26, 2003 21:38:01 +0100